Espressif Systems /ESP32-S2 /EXTMEM /CACHE_DBG_INT_CLR

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Interpret as CACHE_DBG_INT_CLR

Description

register description

Fields

IBUS_ACS_MSK_IC_INT_CLR	The bit is used to clear interrupt by cpu access icache while the corresponding ibus is disabled or icache is disabled which include speculative access.
IBUS_CNT_OVF_INT_CLR	The bit is used to clear interrupt by ibus counter overflow.
IC_SYNC_SIZE_FAULT_INT_CLR	The bit is used to clear interrupt by manual sync configurations fault.
IC_PRELOAD_SIZE_FAULT_INT_CLR	The bit is used to clear interrupt by manual pre-load configurations fault.
ICACHE_REJECT_INT_CLR	The bit is used to clear interrupt by authentication fail.
ICACHE_SET_ILG_INT_CLR	The bit is used to clear interrupt by illegal writing lock registers of icache while icache is busy to issue lock,sync or pre-load operations.
DBUS_ACS_MSK_DC_INT_CLR	The bit is used to clear interrupt by cpu access dcache while the corresponding dbus is disabled or dcache is disabled which include speculative access.
DBUS_CNT_OVF_INT_CLR	The bit is used to clear interrupt by dbus counter overflow.
DC_SYNC_SIZE_FAULT_INT_CLR	The bit is used to clear interrupt by manual sync configurations fault.
DC_PRELOAD_SIZE_FAULT_INT_CLR	The bit is used to clear interrupt by manual pre-load configurations fault.
DCACHE_WRITE_FLASH_INT_CLR	The bit is used to clear interrupt by dcache trying to write flash.
DCACHE_REJECT_INT_CLR	The bit is used to clear interrupt by authentication fail.
DCACHE_SET_ILG_INT_CLR	The bit is used to clear interrupt by illegal writing lock registers of dcache while dcache is busy to issue lock,sync or pre-load operations.
MMU_ENTRY_FAULT_INT_CLR	The bit is used to clear interrupt by mmu entry fault.

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